Intel® Cyclone® 10 FPGAs
As part of Intel Edge-Centric FPGAs, Intel® Cyclone® 10 LP device families are optimized for balanced power and bandwidth for cost-sensitive applications, while Intel® Cyclone® 10 GX device families are optimized for higher-bandwidth and performance applications.
See also: Cyclone® 10 FPGA Design Software, Downloads, Community, and Support.
Intel® Cyclone® 10 FPGAs
Intel® Cyclone® 10 GX FPGA
Optimized for high-bandwidth performance applications, such as machine vision, video connectivity, and smart vision cameras.
Intel® Cyclone® 10 LP FPGA
Optimized for low power and cost-sensitive applications.
Intel® Cyclone® 10 GX Device Family Table
| Product Line | 10CX085 | 10CX105 | 10CX150 | 10CX220 |
|---|---|---|---|---|
| Logic elements (LEs) (K) |
85 | 104 | 150 | 220 |
| Memory blocks (20K) |
291 | 382 | 475 | 587 |
| Memory block (Kb) |
5,820 | 7,640 | 9,500 | 11,740 |
| Distributed memory (Kb) |
653 | 799 | 1,152 | 1,690 |
| Hardened single-precision floating-point multipliers/adders |
84 | 125 | 156 | 192 |
| Global clock networks |
32 | 32 | 32 | 32 |
| Regional clocks |
8 | 8 | 8 | 8 |
| 18 x 19 multipliers |
168 | 250 | 312 | 384 |
| Hard Memory Controllers (DDR3/L, LPDDR3) |
1 | 2 | 2 | 2 |
| Maximum LVDS channels (1.434 Gbps) |
72 | 118 | 118 | 118 |
| Maximum user I/O pins |
192 | 284 | 284 | 284 |
| Maximum 3 V I/O |
48 | 48 | 48 | 48 |
| Transceiver count (12.5 Gbps) |
6 | 12 | 12 | 12 |
| PCI Express* (PCIe*) hardened IP blocks (up to Gen2 x4) |
1 | 1 | 1 | 1 |
Intel® Cyclone® 10 LP Device Family Table
| Product Line | 10CL006 | 10CL010 | 10CL016 | 10CL025 | 10CL040 | 10CL055 | 10CL080 | 10CL120 |
|---|---|---|---|---|---|---|---|---|
| Logic elements (LEs) (K) |
6 | 10 | 16 | 25 | 40 | 55 | 80 | 120 |
| Memory blocks (9K) |
30 | 46 | 56 | 66 | 126 | 260 | 305 | 432 |
| Memory block (Kb) |
270 | 414 | 504 | 594 | 1,134 | 2,340 | 2,745 | 3,888 |
| 18 x 18 multipliers |
15 | 23 | 56 | 66 | 126 | 156 | 244 | 288 |
| Phase-locked loop (PLL) |
2 | 2 | 4 | 4 | 4 | 4 | 4 | 4 |
| Global clock networks |
10 | 10 | 20 | 20 | 20 | 20 | 20 | 20 |
| LVDS channels |
65 | 65 | 137 | 52 | 124 | 132 | 178 | 230 |
| Maximum I/O |
176 | 176 | 340 | 150 | 325 | 321 | 423 | 525 |
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