Panel de control

Encontrar contenido

Refinar resultados
Contenido relacionado

Etiquetas activas

  • 16 Resultados
  • Elementos por página

Cisco UCS M3* Builds on Intel

Five-minute video addressing key innovations of the Cisco UCS M3* line based on Intel® Xeon® processor E5 family.

Optimize Code for Highly Parallel Applications

Optimize code and maximize utilization using Intel® Xeon Phi™ coprocessors, enabling research and discovery with highly parallel applications.

Daresbury Science and Innovation Campus: World-Leading HPC

The Science and Technology Facilities Council (STFC) unveils a high-performance computing (HPC) facility based on Intel® Xeon® processors E5-2670.

IT@Intel Tests the Intel® Xeon® E5 Processor Family in Design Center

In IT@Intel’s design center, the Intel® Xeon® processor E5 family test team deploys rigorous tests for performance and efficiency measurements.

NAG Solves Large Data Problems Quickly

NAG’s Mike Dewar discusses how porting legacy code to Intel® Xeon Phi™ coprocessors enables users to solve large data problems quickly.

ScaleMP Improves Performance of Large Scale Virtual Machines

ScaleMP’s Shai Fultheim explains how Intel® Xeon Phi™ coprocessors run large scale virtual machines without the constraints of physical systems.

Framestore Visual Effects Studio Soars with Flexible IT

Framestore enhances its visual effects leadership in film and integrated advertising with flexible IT solutions based on Intel® Xeon® processors.

Intel® Parallel Computing Centers Overview

Researchers discuss how Intel® Parallel Computing Centers will provide the capabilities to answer bigger questions and make new discoveries.

Altair Speeds High Performance Computing Simulations

Altair’s Bill Nitzberg and Eric Lequiniou explain how Intel® Xeon Phi™ coprocessors speed up high performance computing simulations.

Supermicro Reduces Financial and Power Costs with Intel® Xeon Phi™

Supermicro explains how Intel® Xeon Phi™ coprocessor’s parallel workload performance reduces financial and power costs of high performance computing.